A reference voltage programmable 6-bit differential delay-line ADC for digitally controlled DC-DC switching converters

T. Wei, W. Liu, Lifeng Yang
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引用次数: 1

Abstract

This paper presents the design of a 6-bit, 25 Msps, reference voltage programmable delay-line Analog-to-Digital Converter (ADC), which is aimed to use in the digitally controlled DC-DC switching converters. A new differential bias circuit is used to improve the linearity of delay cells and also the ADC. The reference voltage can be adjusted from 1.8 V to 2.5 V with 0.2 V step, and the input voltage range is limited within ±200mV around the reference voltage. This ADC is implemented in 0.18um CMOS process and works at 3.3 V power supply. The simulation results for this ADC show that, the power dissipation is 450 uW, ENOB is 5.96-bit, DNL and INL is less than ±0.55 LSB and ±0.42 LSB, respectively. The designed ADC has the power-and die area-efficiency, it can be used as the built-in ADC of the digital controller in the digitally controlled DC-DC switching converters.
参考电压可编程6位差分延迟线ADC,用于数字控制DC-DC开关转换器
本文设计了一种6位、25 Msps参考电压可编程延迟线模数转换器(ADC),用于数字控制DC-DC开关转换器。采用一种新的差分偏置电路来提高延迟单元和ADC的线性度。参考电压可通过0.2 V步进从1.8 V调节到2.5 V,输入电压范围限制在参考电压周围±200mV。该ADC采用0.18um CMOS工艺,工作在3.3 V电源下。仿真结果表明,该ADC的功耗为450 uW, ENOB为5.96位,DNL和INL分别小于±0.55 LSB和±0.42 LSB。所设计的ADC具有较好的功率效率和芯片面积效率,可作为数字控制器的内置ADC应用于数字控制DC-DC开关变换器中。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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