{"title":"PRUS - processor network for digital circuit implementation","authors":"Stanley Hyduke, V. Hahanov, V. Obrizan, O. Guz","doi":"10.1109/DSD.2005.65","DOIUrl":null,"url":null,"abstract":"This paper offers high-performance technology for processing Boolean equations, based on compiler synchronized parallel-processor network-based logic device PRUS (programmable unlimited systems) - single-bit spherical multiprocessor, implemented into ASIC. This technology allows to perform parallel, sequential and pipelined Boolean equations processing using AND, OR, NOT, XOR operations. Multiprocessor is very efficient in hardware implementation - e.g. 256MB RAM is enough for processing Boolean equations containing 20 millions gates.","PeriodicalId":119054,"journal":{"name":"8th Euromicro Conference on Digital System Design (DSD'05)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"8th Euromicro Conference on Digital System Design (DSD'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DSD.2005.65","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper offers high-performance technology for processing Boolean equations, based on compiler synchronized parallel-processor network-based logic device PRUS (programmable unlimited systems) - single-bit spherical multiprocessor, implemented into ASIC. This technology allows to perform parallel, sequential and pipelined Boolean equations processing using AND, OR, NOT, XOR operations. Multiprocessor is very efficient in hardware implementation - e.g. 256MB RAM is enough for processing Boolean equations containing 20 millions gates.