High density printed circuit board using B/sup 2/it/sup TM/ technology

2nd 1998 IEMT/IMC Symposium (IEEE Cat. No.98EX225) Pub Date : 1998-04-15 DOI:10.1109/IEMTIM.1998.704667

K. Goto, T. Oguma, Y. Fukuoka

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引用次数: 3

Abstract

The authors have developed the B/sup 2/it printed circuit board. The technology was reported initially in a paper at the IMC meeting in April 1996. Since that time, this technology has been applied to a variety of boards. Among these boards, we report in this paper the B/sup 2/it application to semiconductor packaging. The product has /spl phi/0.2/spl sim/0.1 mm bumps (fine bumps). In order to produce a multilayer high density printed circuit board, we need to add up each layer with conductive bumps over the base layer, which we call the en bloc laminate process. By repeating the en bloc laminate process multiple times, multilayers and stacked arrays are possible. Signals can go down to internal layers directly from surface pad via bumps. This is effective for substrates such as BGA type packages. With the use of the B/sup 2/it/sup TM/ method, it is possible to omit the outer layer plating process. This is an advantage for fine line patterning, because etching the copper foil alone enables circuit patterning. In addition, we introduced two types of liquid photoresist process: the ED method, and the spin coater liquid photoresist process.

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高密度印刷电路板采用B/sup 2/it/sup TM/技术

作者开发了B/sup 2/it印刷电路板。这项技术最初在1996年4月IMC会议上的一篇论文中报告。从那时起，这项技术已经应用于各种各样的板。在这些电路板中，我们报告了B/sup /it在半导体封装中的应用。产品有/spl φ /0.2/spl sim/0.1 mm凸起(细凸起)。为了生产多层高密度印刷电路板，我们需要在每一层的基础层上加上导电凸起，我们称之为整体层压工艺。通过多次重复整体层压工艺，多层和堆叠阵列成为可能。信号可以通过凸起直接从表面垫层传递到内层。这是有效的基板，如BGA型封装。使用B/sup 2/it/sup TM/方法，可以省略外层电镀工艺。这是一个优点，为细线图案，因为蚀刻铜箔单独使电路图案。此外，我们还介绍了两种类型的液体光刻胶工艺:ED法和自旋涂布液体光刻胶工艺。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2nd 1998 IEMT/IMC Symposium (IEEE Cat. No.98EX225)

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