Physics of electronic transport in low-dimensionality materials for future FETs

M. Fischetti, W. Vandenberghe, Bo Fu, S. Narayanan, J. Kim, Z. Ong, A. Suarez-Negreira, C. Sachs, S. Aboud
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引用次数: 1

Abstract

We show that scaling rules, quantum confinement in thin bodies, and the resulting gate leakage render imperative the use of low-dimensionality materials as channels in devices scaled beyond the 10 nm gate length. We then consider a few examples of two-dimensional materials of great interest, graphene and bilayer graphene, and show how the dielectric environment (gate and interlayer insulators, nearby gates) has a dramatically strong effect on the electronic properties of systems such as supported graphene, nanoribbons, and graphene bilayers in which a Bose-Einstein exciton condensation has been predicted to occur at high temperature. Finally, we consider the novel concept of devices based on monolayer tin (`stannanane') as a topological insulator.
未来场效应管低维材料中的电子输运物理学
我们表明,缩放规则,薄体中的量子限制以及由此产生的栅极泄漏使得在超过10nm栅极长度的器件中使用低维材料作为通道势在必行。然后,我们考虑了一些非常感兴趣的二维材料,石墨烯和双层石墨烯的例子,并展示了介电环境(栅极和层间绝缘体,附近栅极)如何对支撑石墨烯,纳米带和石墨烯双层等系统的电子特性产生巨大的影响,其中已经预测在高温下会发生玻色-爱因斯坦激子凝聚。最后,我们考虑了基于单层锡(“锡烷”)作为拓扑绝缘体的器件的新概念。
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