A New Configuration for Two-Stage OTA LHP Zeroes

Abstract

A non-Miller high bandwidth (BW) two-stage class A-AB operational transconductance amplifier (OTA) is presented. A nulling resistor with a series compensating capacitor is applied at the output node, extending the gain-bandwidth product (GBW) by introducing a left-half-plane (LHP) zero. Also, simple circuitry included an analog inverter is applied to achieve class A-AB. The proposed circuit is simulated using a $\boldsymbol{0.18\mu} \mathbf{m}\ \boldsymbol{1.8}\mathbf{V}$ CMOS process standard technology. Simulation results with a 10pF capacitance load show that DC gain, GBW, average SR, average 1% settling time, and phase margin (PM) are 56.0 dB, 145.2 MHz, 89.8 $\mathbf{V}/\mu\mathbf{s}, \boldsymbol{25.0}$ ns, and 58.2°, respectively. The PM, GBW, and average SR change to 79.1°,26.7 MHz, and $\boldsymbol{17.1}\mathbf{V}/\boldsymbol{\mu}\mathbf{S}$, respectively, when driving a 100 pF capacitance load. Small signal analysis and simulation results indicate that the proposed OTA has a good performance at a large capacitive load. The proposed amplifier consumes 0.54mW @ 1.8V, which makes it a high current efficiency two-stage amplifier.