Analog VLSI Neural Network Testing

M. A. Redford, P. Nagvajara
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引用次数: 0

Abstract

As research works in analog VLSI have started evolving from research material to designing neural electronic applications. It is important, in view of testing complexities to think ahead on how to design testable neural circuits be it in discrete or VLSI level. For such applications to be reliable, there are steps necessary to understand. In other to deal with the issues of complexities in the hidden layer of the neural network. The methods proposed, considered utilities of analog design. Which are useful in both design and manufacturing of the analog VLSI artificial neural network (ANN). This work, therefore, revolves around design for testability with test coverage using ANN of the fault dictionary. The presented techniques show practical approach towards design and realization of reliable ANN.
模拟VLSI神经网络测试
随着模拟VLSI的研究工作开始从研究材料发展到设计神经电子应用。考虑到测试的复杂性,提前考虑如何设计可测试的神经电路是很重要的,无论是在离散级还是超大规模集成电路级。要使此类应用程序可靠,需要了解一些必要的步骤。另一方面处理神经网络隐藏层的复杂性问题。所提出的方法考虑了模拟设计的实用性。这对模拟VLSI人工神经网络(ANN)的设计和制造具有一定的指导意义。因此,这项工作围绕着使用故障字典的人工神经网络进行测试覆盖率的可测试性设计。所提出的技术为设计和实现可靠的人工神经网络提供了实用的途径。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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