FPGA Implementation for Epileptic Seizure Detection Using Amplitude and Frequency Analysis of EEG Signals

D. Selvathi, H. Selvaraj
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引用次数: 6

Abstract

Patients with epilepsy (a central nervous system disorder) suffer from frequent seizures that occur at unpredictable times without any warning. Therefore, it is necessary to identify the occurrence of seizure in an epileptic patient and prevents patients from SUDEP (SUDDEN UNEXPLAINED DEATH IN EPILEPSY). Prediction of epileptic seizure through analysis of scalp EEG signal which is the measure of the brain's electrical activity avoid aggressive situation of epileptic patients during their seizure. This problem is challenging because the brain's electrical activity is composition of numerous classes with overlapping characteristics which vary significantly across patients. It is critical for separating seizure from other types of brain activity. In this proposed method, seizure detection process is implemented in FPGA using two main parameters of EEG signal such as frequency and amplitude which show variations during seizure. Input signal for this work was obtained from CHB-MIT database. The samples of input EEG signals were obtained in the form of .mat file for the duration of 10 seconds. This input file sample values of EEG signal are digitized which is in the form of sign magnitude representation for further processing in FPGA. Signals are used in text file format for Verilog programming. The first bit (MSB bit) represents sign of that particular sample. The frequency of the input signal was found using zero crossing counters. This count value was compared with general brain wave criteria. Similarly for amplitude level analysis, the remaining bits of input sample were compared with validation values. If there is any large deviation in any one of this comparisons found, then the signal abnormality can be predicted. After implementation, 82% of LUTs and 14% of registers were utilized. Timing summary for implementing this proposed work is obtained as 13.568ns.
基于EEG信号幅频分析的癫痫发作检测的FPGA实现
癫痫(一种中枢神经系统疾病)患者经常在没有任何警告的情况下,在不可预测的时间发作。因此,有必要确定癫痫患者癫痫发作的发生,防止患者发生SUDEP(癫痫猝死)。通过对头皮脑电图信号的分析来预测癫痫发作,是对癫痫患者癫痫发作时脑电活动的测量,避免癫痫患者发作时的侵袭性情况。这个问题是具有挑战性的,因为大脑的电活动是由许多类组成的,这些类具有重叠的特征,在不同的患者之间差异很大。这对于将癫痫发作与其他类型的大脑活动区分开来至关重要。该方法利用脑电图信号在癫痫发作过程中变化的频率和幅度两个主要参数,在FPGA上实现癫痫发作检测过程。本工作的输入信号来自CHB-MIT数据库。输入的脑电信号以。mat文件的形式采样,采样时间为10秒。该脑电图信号的输入文件采样值被数字化,以符号幅度表示的形式在FPGA中进一步处理。信号以文本文件格式用于Verilog编程。第一个位(MSB位)表示该特定样本的符号。输入信号的频率是使用零交叉计数器找到的。将该计数值与一般脑电波标准进行比较。同样,对于振幅水平分析,将输入样本的剩余比特与验证值进行比较。如果发现其中任何一个比较存在较大偏差,则可以预测信号异常。实施后,使用了82%的lut和14%的寄存器。完成这项工作的时间总结为13.568ns。
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