Hierarchical Clustering for On-Chip Networks

Abstract

Hierarchy and communication locality are a must for many-core systems. As systems scale to dozens or hundreds of cores, we simply cannot afford the power consumption and latency of random communication that spans the entire chip. Existing hierarchical Networks-on-Chip (NoCs) support communication locality only for a fixed cluster of nodes; providing a fixed hierarchy is too restrictive in terms of parallelism and data placement. Therefore, we propose a new, more flexible class of hierarchical NoCs: Elastic Hierarchical NoCs. Elastic Hierarchical NoCs dynamically adjust the number and size of clusters during runtime according to the system's communication demands. The interconnect can adapt to changes in communication locality across different application phases, between applications and in the presence of server consolidation. Our design improves overall system performance by up to 46% and 13% on average over a conventional 2D mesh and by up to 16% and 6% on average over an existing hierarchical NoC implementation. Power consumption is reduced by 45% and 7% respectively on average.