Complementary metrology techniques to detect low levels of metallic contaminations on bare silicon wafers

Abstract

The semiconductor industry is a highly demanding industry in terms of quality and cleanliness of the production environment. Indeed, metallic contamination is to be avoided because harmful for the chips. The goal of this study is to share experiences of metal contaminations on bare silicon wafers and how complementary metrology methods can be used to detect low levels of metals and find the root cause. It illustrates the difficulty to choose between different techniques to detect a problem and the dependency of thermal treatment to detect a contaminant by lifetime techniques.