{"title":"Study of DC and AC characteristics of gate-stack doping-less tunnel FET","authors":"Deepali Vasnik, M. Pattanaik","doi":"10.1109/MICROCOM.2016.7522408","DOIUrl":null,"url":null,"abstract":"A double gated structure of Gate-Stack Doping-Less Tunnel Field Effect Transistor (GS-DLTFET) is proposed in this paper. Source and Drain regions of the FET are not doped using the charge plasma concept, which makes the device free from the random dopant fluctuation issue. A multi-layer structure is formed on the gate by imposing the layers of dielectrics. The device thus formed is analyzed by various parameters i.e., performing the AC and DC simulations on the device and studying the drain current characteristics of the device. One of the important factor i.e., effect of temperature variations are also seen on the various parameters of the device. The analyzed results are compared with the Doping-Less Tunnel Field Effect Transistor (DLTFET) and found to be better in performance. SILVACO ATLAS device simulator software has been used to carry out the simulations of the proposed device for analyzing the device performance.","PeriodicalId":118902,"journal":{"name":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MICROCOM.2016.7522408","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A double gated structure of Gate-Stack Doping-Less Tunnel Field Effect Transistor (GS-DLTFET) is proposed in this paper. Source and Drain regions of the FET are not doped using the charge plasma concept, which makes the device free from the random dopant fluctuation issue. A multi-layer structure is formed on the gate by imposing the layers of dielectrics. The device thus formed is analyzed by various parameters i.e., performing the AC and DC simulations on the device and studying the drain current characteristics of the device. One of the important factor i.e., effect of temperature variations are also seen on the various parameters of the device. The analyzed results are compared with the Doping-Less Tunnel Field Effect Transistor (DLTFET) and found to be better in performance. SILVACO ATLAS device simulator software has been used to carry out the simulations of the proposed device for analyzing the device performance.