{"title":"Stability analysis of SRAM cell using CNT and GNR field effect transistors","authors":"Parmjit Singh, R. Chandel, N. Sharma","doi":"10.1109/IC3.2017.8284335","DOIUrl":null,"url":null,"abstract":"In modern technologies, read stability and write ability have become major concerns in nano regime for static random access memory (SRAM) cell. This paper provides the stability analysis of 6T-SRAM cell using the N-curve method. Various performance parameters namely SVNM, SINM, WTV, and WTI are evaluated for SRAM. Variation of SVNM, SINM, WTV and WTI with scaled supply voltage has been presented. A comparative analysis of CNTFET and GNRFET with conventional CMOS technology using HSPICE tool has been performed. To ensure a fair comparison of (19,0) CNTFET(DCNT=1.49nm) and (13,0) GNRFET(width=1.49nm) dimensions have been chosen for proper circuit size integration. The simulation results show that the SRAM cells designed using CNT and GNR field effect transistors (FETs) have better stability as compared to CMOS technology.","PeriodicalId":147099,"journal":{"name":"2017 Tenth International Conference on Contemporary Computing (IC3)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Tenth International Conference on Contemporary Computing (IC3)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IC3.2017.8284335","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
In modern technologies, read stability and write ability have become major concerns in nano regime for static random access memory (SRAM) cell. This paper provides the stability analysis of 6T-SRAM cell using the N-curve method. Various performance parameters namely SVNM, SINM, WTV, and WTI are evaluated for SRAM. Variation of SVNM, SINM, WTV and WTI with scaled supply voltage has been presented. A comparative analysis of CNTFET and GNRFET with conventional CMOS technology using HSPICE tool has been performed. To ensure a fair comparison of (19,0) CNTFET(DCNT=1.49nm) and (13,0) GNRFET(width=1.49nm) dimensions have been chosen for proper circuit size integration. The simulation results show that the SRAM cells designed using CNT and GNR field effect transistors (FETs) have better stability as compared to CMOS technology.