High-speed FPGA-Based Payload Computer for an In-Orbit Verification of a 71–76 GHz Satellite Downlink

L. Manoliu, B. Schoch, M. Koller, Jens Wieczorek, S. Klinkner, I. Kallfass
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引用次数: 6

Abstract

This paper introduces the system architecture, implementation and measured characterization of the FPGA-based adaptive onboard payload computer used for an in-orbit verification of an E-band high bandwidth communication system. The mission goal is to evaluate the atmospheric effects on a multiGigabit data-downlink, in the frequency range of 71–76 GHz with a data rate of minimum 10 Gbit/s, from a 6U CubeSat in low earth orbit to a ground station. The miniaturized onboard payload computer in conjunction with a fast digital-to-analog converter shall serve as an arbitrary waveform generator and as image processing unit.
基于高速fpga的71-76 GHz卫星下行链路在轨验证有效载荷计算机
介绍了用于e波段高带宽通信系统在轨验证的基于fpga的自适应机载有效载荷计算机的系统结构、实现和实测特性。该任务的目标是评估大气对多千兆数据下行链路的影响,该链路的频率范围为71-76 GHz,数据速率至少为10 Gbit/s,从低地球轨道上的6U立方体卫星到地面站。小型化的机载有效载荷计算机与快速数模转换器相结合,可作为任意波形发生器和图像处理单元。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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