Demonstration system of reconfigurable multi-valued logic electronic processor

Abstract

The reconfigurable multi-valued logic processor consists of a large number of processor units that can be grouped and reconfigured at runtime, enabling it to implement a wide variety of logic operators and many-bit parallel adders. In this study, we design and implement a demonstration system of an FPGA-based reconfigurable multi-valued logic processor using the AX7020 development board. To demonstrate the system's capabilities, we develop a demonstration program based on embedded Linux and Qt, which includes a graphical user interface for a 1000-trit reconfigurable ternary logic processor, a 32-quit reconfigurable quaternary logic processor and a 64-bit MSD adder. The program runs on the ARM Cortex-A9 processor on the PS side of the development board, with human-machine interaction achieved through the AN970 7-inch LCD touch screen external to the PL side of the development board. We verify the reliability of the reconfigurable multi-valued logic electronic processor's hardware functions in the demonstration system through various means, including software simulation checking, automatic random tests and manual tests on the demonstration system. The results show that the demonstration system can let users experience the characteristics of reconfigurable multi-valued logic electronic processor, such as processor units grouping and reconfiguration, ternary/quaternary logic operations and MSD addition operations, through the touch screen in a user-friendly way.