Assurance of Fault-Tolerance in Bit-Stream Computing Converters

Abstract

The article is devoted to the approach to the construction of original bit-stream devices, characterized by the high fault-tolerance. This property is achieved due to the original structure of the devices, fault-tolerant forms of information representation and the use of an elemental base with the high degree of technological reliability. A bit-stream multiplier-divider unit is considered as an example; its RTL description is presented. The results of the multiplier-divider unit simulation are shown; the process of the result recovery after the noise influence is presented.