{"title":"A SpaceWire PHY with Double Data Rate and Fallback Redundancy","authors":"Mong Tee Sim, Yanyan Zhuang","doi":"10.1109/socc49529.2020.9524763","DOIUrl":null,"url":null,"abstract":"In satellite applications, the cost of failure is significantly higher than regular applications. As a result, redundancy is critical. In this paper, we propose a SpaceWire Physical Layer (PHY) Transceiver with a dual-data lane that can support double the data rate and fallback redundancy. The dual-data lane allows twice the data rate with the same transmission frequency. With a lane muxing circuitry embedded in the PHY, our design can support four transmission topologies for fallback redundancy. We used Verilog HDL and ModelSim to create, simulate, and test our SpaceWire PHY Transceiver design. The results show that our design can transmit and receive data in four topologies. When operating in the fourth topology mode with a dual-data lane can deliver twice the data rate compared to other SpaceWire PHY using the same transmission frequency.","PeriodicalId":114740,"journal":{"name":"2020 IEEE 33rd International System-on-Chip Conference (SOCC)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 33rd International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/socc49529.2020.9524763","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In satellite applications, the cost of failure is significantly higher than regular applications. As a result, redundancy is critical. In this paper, we propose a SpaceWire Physical Layer (PHY) Transceiver with a dual-data lane that can support double the data rate and fallback redundancy. The dual-data lane allows twice the data rate with the same transmission frequency. With a lane muxing circuitry embedded in the PHY, our design can support four transmission topologies for fallback redundancy. We used Verilog HDL and ModelSim to create, simulate, and test our SpaceWire PHY Transceiver design. The results show that our design can transmit and receive data in four topologies. When operating in the fourth topology mode with a dual-data lane can deliver twice the data rate compared to other SpaceWire PHY using the same transmission frequency.