{"title":"A Novel Blind Detection Method and FPGA Implementation for Energy-Efficient Sidelink Communications","authors":"Chenhao Zhang, Haiqin Hu, Shan Cao, Zhiyuan Jiang","doi":"10.1109/SiPS52927.2021.00010","DOIUrl":null,"url":null,"abstract":"A novel physical sidelink control channel (PSCCH) blind detection method based on demodulation reference signal (DMRS) detection is proposed for sidelink communications in cellular vehicular-to-everything (C-V2X). In the proposed method, the user equipment (UE) first performs coherent energy detection on the DMRS positions. According to the information of the time/frequency location where the DMRS is detected, the UE can adjust the decoding area to minimize unnecessary blind decoding attempts. Based on the proposed algorithm and the channel estimation method, a VLSI architecture of joint energy detection and channel estimation (JEC) is proposed. Reference implementation results for a Xilinx Virtex-7 FPGA show that our design can reduce hardware complexity and energy consumption.","PeriodicalId":103894,"journal":{"name":"2021 IEEE Workshop on Signal Processing Systems (SiPS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE Workshop on Signal Processing Systems (SiPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SiPS52927.2021.00010","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A novel physical sidelink control channel (PSCCH) blind detection method based on demodulation reference signal (DMRS) detection is proposed for sidelink communications in cellular vehicular-to-everything (C-V2X). In the proposed method, the user equipment (UE) first performs coherent energy detection on the DMRS positions. According to the information of the time/frequency location where the DMRS is detected, the UE can adjust the decoding area to minimize unnecessary blind decoding attempts. Based on the proposed algorithm and the channel estimation method, a VLSI architecture of joint energy detection and channel estimation (JEC) is proposed. Reference implementation results for a Xilinx Virtex-7 FPGA show that our design can reduce hardware complexity and energy consumption.