P. Gilbert, P. Tsui, Shih-Wei Sun, S. Jamison, J. Miller
{"title":"Performance improvement of a thick field oxide ESD protection circuit by halo implant","authors":"P. Gilbert, P. Tsui, Shih-Wei Sun, S. Jamison, J. Miller","doi":"10.1109/CICC.1997.606580","DOIUrl":null,"url":null,"abstract":"Optimization of a sub-0.5 /spl mu/m ESD protection circuit using halo implant is described. A p-type halo implant significantly improves the ESD robustness of a high performance I/O circuit as noted by Human Body Model (HBM) test results. The improved ESD performance is directly attributed to the ability of the halo implanted Thick Field Oxide (TFO) device to inhibit the turn-on of the n-channel output buffer during an ESD event. Improved ESD performance is achieved without the use of additional series resistance and with no increase in device area. The results represent the first time transmission-line pulse generator (TLPG) analysis has been used on a fully synthesized I/O circuit to predict wafer level ESD performance.","PeriodicalId":111737,"journal":{"name":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1997.606580","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Optimization of a sub-0.5 /spl mu/m ESD protection circuit using halo implant is described. A p-type halo implant significantly improves the ESD robustness of a high performance I/O circuit as noted by Human Body Model (HBM) test results. The improved ESD performance is directly attributed to the ability of the halo implanted Thick Field Oxide (TFO) device to inhibit the turn-on of the n-channel output buffer during an ESD event. Improved ESD performance is achieved without the use of additional series resistance and with no increase in device area. The results represent the first time transmission-line pulse generator (TLPG) analysis has been used on a fully synthesized I/O circuit to predict wafer level ESD performance.