A layout approach to monolithic microwave IC

A. Nagao, Chiyoshi Yoshioka, T. Kambe, I. Shirakawa
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引用次数: 2

Abstract

A layout approach is attempted dedicatedly for MMICs (monolithic microwave integrated circuits), on which predominant layout elements are transistors, resistors, capacitors, inductors, coplanar waveguides, T junctions, etc., formed by the GaAs fabrication process. The layout issue typical of such MMICs consists essentially in how to realize a single layer placement of different shapes of layout elements under a variety of spacing, orientating, and shaping constraints. Each layout element is modeled to simplify placement tasks subject to different placement constraints, and then a set of the interconnection requirements among elements is represented by a graph, to which a planarization algorithm is effectively applied. As a result of this planarization, a placement procedure is constructed mainly by repeated application of a merging scheme. A number of experimental results are also shown to demonstrate the practicability of the described layout approach.
一种单片微波集成电路的布局方法
本文专门针对单片微波集成电路(mmic)尝试了一种布局方法,其中主要的布局元件是晶体管、电阻、电容、电感、共面波导、T结等,由砷化镓(GaAs)制造工艺形成。这种mmic典型的布局问题本质上包括如何在各种间距、方向和形状约束下实现不同形状的布局元素的单层放置。对每个布局元素进行建模,简化不同布局约束下的布局任务,然后用图表示一组元素之间的互连需求,并有效地应用了平面化算法。由于这种平面化,放置过程主要通过重复应用合并方案来构建。一些实验结果也证明了所述布局方法的实用性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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