Z. Chowdhury, S. K. Khatamifard, Zhaoyong Zheng, T. Moreshet, R. I. Bahar, Ulya R. Karpuzcu
{"title":"Barrier Synchronization vs. Voltage Noise: A Quantitative Analysis*","authors":"Z. Chowdhury, S. K. Khatamifard, Zhaoyong Zheng, T. Moreshet, R. I. Bahar, Ulya R. Karpuzcu","doi":"10.1109/IISWC47752.2019.9041950","DOIUrl":null,"url":null,"abstract":"Synchronization is the key to guaranteeing correct execution of parallel programs at any scale. Barriers represent heavily used synchronization primitives which prevent parallel tasks from proceeding to subsequent stages of computation before all tasks are done with previous stages. Accordingly, all tasks wait at a barrier until the slowest tasks finish, at which point all tasks can proceed to the next stage of computation. This usually translates into an abrupt change in the activity, i.e., current demand from the power delivery network, and if not orchestrated properly, can easily lead to voltage emergencies. In this study we characterize the impact of different barrier structures on voltage noise.","PeriodicalId":121068,"journal":{"name":"2019 IEEE International Symposium on Workload Characterization (IISWC)","volume":"118 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE International Symposium on Workload Characterization (IISWC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IISWC47752.2019.9041950","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Synchronization is the key to guaranteeing correct execution of parallel programs at any scale. Barriers represent heavily used synchronization primitives which prevent parallel tasks from proceeding to subsequent stages of computation before all tasks are done with previous stages. Accordingly, all tasks wait at a barrier until the slowest tasks finish, at which point all tasks can proceed to the next stage of computation. This usually translates into an abrupt change in the activity, i.e., current demand from the power delivery network, and if not orchestrated properly, can easily lead to voltage emergencies. In this study we characterize the impact of different barrier structures on voltage noise.