Stefan Palte, David Gasch, W. Oberschelp, G. Schroder
{"title":"Timing Control of a Modular Multilevel Converter Using a Bootstrapping Circuit as Submodule Switch Driver","authors":"Stefan Palte, David Gasch, W. Oberschelp, G. Schroder","doi":"10.1109/SPEEDAM.2018.8445280","DOIUrl":null,"url":null,"abstract":"Subject of this paper is the implementation of a bootstrap driver for the GaN-based transistors inside the submodules of a modular multilevel converter (M2C). To compensate the disadvantage of a limited on-time of the high-side transistor in the half-bridge configuration, a timing control function is added to the sorting algorithm of each arm of the converter. This function switches two submodules if a maximum on-time of one submodule is reached. The proposed control was simulated using a discrete model.","PeriodicalId":117883,"journal":{"name":"2018 International Symposium on Power Electronics, Electrical Drives, Automation and Motion (SPEEDAM)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Symposium on Power Electronics, Electrical Drives, Automation and Motion (SPEEDAM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPEEDAM.2018.8445280","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Subject of this paper is the implementation of a bootstrap driver for the GaN-based transistors inside the submodules of a modular multilevel converter (M2C). To compensate the disadvantage of a limited on-time of the high-side transistor in the half-bridge configuration, a timing control function is added to the sorting algorithm of each arm of the converter. This function switches two submodules if a maximum on-time of one submodule is reached. The proposed control was simulated using a discrete model.