{"title":"High performance cost effective inverter design — 1200V SPT+ IGBT chip in combination with CAL4 diode and 17mm IGBT module platform","authors":"D. Seng, A. Wahi","doi":"10.1109/IICPE.2006.4685344","DOIUrl":null,"url":null,"abstract":"SEMIKRON is introducing the 2nd generation of the Soft-Punch-Through (SPT) Isolated Gate Bipolar Transistor (IGBT), the so called SPT+, in its flat 17 mm SEMiXtrade power module packages. For an optimised performance, the CAL 4 (Controlled Axial Lifetime) diode from SEMIKRON, especially designed for the fourth IGBT generation, will be used. This combination of new technologies in the latest power module package shows lower switching and conduction losses in comparison to the former chip generations. These improvements allow cost effective inverter designs together with improved softness from the chip side.","PeriodicalId":227812,"journal":{"name":"2006 India International Conference on Power Electronics","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 India International Conference on Power Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IICPE.2006.4685344","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
SEMIKRON is introducing the 2nd generation of the Soft-Punch-Through (SPT) Isolated Gate Bipolar Transistor (IGBT), the so called SPT+, in its flat 17 mm SEMiXtrade power module packages. For an optimised performance, the CAL 4 (Controlled Axial Lifetime) diode from SEMIKRON, especially designed for the fourth IGBT generation, will be used. This combination of new technologies in the latest power module package shows lower switching and conduction losses in comparison to the former chip generations. These improvements allow cost effective inverter designs together with improved softness from the chip side.