{"title":"Analysis of pattern dependencies on copper damascene chemical mechanical polishing","authors":"Serita Narinesingh, J. Leffew, W. Moreno","doi":"10.1109/ICCDCS.2002.1004047","DOIUrl":null,"url":null,"abstract":"The drawbacks in using CMP on copper are well know but currently misunderstood. The purpose of this research project was to achieve a concise understanding of copper CMP issues particularly associated with pattern, surface topography and its dependencies. With the use of Lucent Technologies Bell Labs CMP tools and wafers deposited with copper and TEOS, profilometry measurements were made. These wafers had arrays of lines with varying pitch where density was kept constant. The study used a special test mask with a unique set of structures to determine the effects of pitch features. The interaction of these layout effects was carefully analyzed using polish data taken with small time-steps to capture the transition of the polish characteristics before and after the barrier was exposed. Using the data gathered from the tests on these wafers, an analysis of the copper CMP dependence on wafer pattern variations, such as pitch, was performed. The key issues, dishing and erosion, were then determined and addressed. A recommendation for better feature sizes based on certain trends for minimal erosion and dishing was developed. It was found that erosion had very little dependence on pitch variation. Dishing increased with pitch and copper line width.","PeriodicalId":416680,"journal":{"name":"Proceedings of the Fourth IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.02TH8611)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Fourth IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.02TH8611)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCDCS.2002.1004047","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The drawbacks in using CMP on copper are well know but currently misunderstood. The purpose of this research project was to achieve a concise understanding of copper CMP issues particularly associated with pattern, surface topography and its dependencies. With the use of Lucent Technologies Bell Labs CMP tools and wafers deposited with copper and TEOS, profilometry measurements were made. These wafers had arrays of lines with varying pitch where density was kept constant. The study used a special test mask with a unique set of structures to determine the effects of pitch features. The interaction of these layout effects was carefully analyzed using polish data taken with small time-steps to capture the transition of the polish characteristics before and after the barrier was exposed. Using the data gathered from the tests on these wafers, an analysis of the copper CMP dependence on wafer pattern variations, such as pitch, was performed. The key issues, dishing and erosion, were then determined and addressed. A recommendation for better feature sizes based on certain trends for minimal erosion and dishing was developed. It was found that erosion had very little dependence on pitch variation. Dishing increased with pitch and copper line width.