Co-design and Signal-Power Integrity/EMI Co-analysis of a Switchable High-speed Inter-Chiplet Serial Link on an Active Interposer

Abstract

This paper proposes a chiplet-based domain specific architecture (DSA) module on active interposer for convolutions in various scenarios. By constructing an integral development frame, the I/O and inter-chiplet links behaviors together with signal integrity (SI), power integrity (PI) and electromagnetic interference (EMI) issues can be co-considered and co-analyzed in the early phases, facilitating efficient implementation of heterogeneous integration. Additionally, the proposed solution takes advantage of the flexibility of a novel network-on-chip (NoC) switching fabric for inter-chiplet data exchange and versatile auxiliary circuitry enabled by an active interposer, to enhance its performance and extend the scope of application. The design and analysis results are shown, as well as associated options and potentials of the development frame. Up to now, the prototype chip samples for the switching fabric has been delivered by foundry; detailed physical design and assembly of the DSA module with off-the-shell dies and cost- effective Si interposer solution are under way.