An analog turbo decoder for the UMTS standard

Abstract

The design and test results of a three-metal, double-poly, 0.35 μm; CMOS analog turbo decoder for the rate-1/3, block length 40, UMTS turbo code, are presented. A discrete-time model of analog decoding networks is also presented. This model can be used as a tool to both predict chip performance in a short time and give design guidelines for complex decoders, for which circuit-level simulations are impractical.