High speed 8T SRAM cell design with improved read stability at 180nm technology

P. Raikwal, V. Neema, A. Verma
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引用次数: 5

Abstract

In this work a novel single-ended 8T static random access memory cell with low power consumption and high read static noise margin is proposed. In the proposed cell to improve read margin differential wordlines are utilized. Additionally during read operation the storing nodes of the cell are totally decoupled from the bit line, which enhances the read capability of the proposed cell. The read static margin of the proposed 8T SRAM cell is 67.37% improved as compare to 6T SRAM cell. The proposed cell saves 41.5% average power during write ‘1’ operation and saves 39.78% power in write ‘0’ operation. During read operation it saves 89.91% power as compare to standard 6T SRAM cell. The proposed 8T SRAM cell shows less propagation delay as compare to conventional 6T SRAM cell.
高速8T SRAM单元设计,提高了180nm技术的读取稳定性
本文提出了一种低功耗、高读静态噪声裕度的单端8T静态随机存取存储单元。在该单元中,利用差分字行来提高读距。此外,在读取操作中,单元的存储节点与位线完全解耦,提高了单元的读取能力。与6T SRAM单元相比,8T SRAM单元的读取静态裕度提高了67.37%。该单元在写“1”操作时平均节省41.5%的功率,在写“0”操作时节省39.78%的功率。在读取操作期间,与标准6T SRAM单元相比,它节省了89.91%的功率。与传统的6T SRAM单元相比,所提出的8T SRAM单元具有更小的传播延迟。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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