Rapid prototyping hardware platforms for the development and testing of OFDM based communication systems

Craig Jamieson, S. Melvin, J. Ilow
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引用次数: 10

Abstract

Implementation of modern digital transceivers requires an expertise in numerous fields. Conventional transceiver design methods are no longer sufficient to guarantee a fast conversion from initial concept to final product. Moreover, in the testing phase, system simulations alone cannot provide the full insight into the system parameters and performance, especially at the RF stages, where the modeling of power amplifier non-linearities is a highly complex task. To address these design gaps, this paper utilizes software radio solutions. Specifically, it elaborates on transceiver architectural methods at the baseband involving hardware/software partitioning, as well as automatic digital signal processing (DSP) coding strategies that allow for rapid prototyping, testing and verification of algorithms developed in the design simulation stages. In particular, DSP processor and field programmable gate array (FPGA)-based testbeds are described that offer different advantages in the transceiver rapid prototyping methodology. These testbeds were designed to eventually be used in experiments geared towards demonstrating the effectiveness of compensation algorithms for wireless systems like wireless local area network (WLAN) and digital audio broadcasting (DAB), where orthogonal frequency division multiplexed (OFDM) signaling is deployed.
用于开发和测试OFDM通信系统的快速原型硬件平台
现代数字收发器的实现需要许多领域的专业知识。传统的收发器设计方法不再足以保证从最初的概念到最终产品的快速转换。此外,在测试阶段,单靠系统仿真无法全面了解系统参数和性能,特别是在射频阶段,功率放大器非线性建模是一项非常复杂的任务。为了解决这些设计缺陷,本文利用软件无线电解决方案。具体来说,它详细阐述了涉及硬件/软件划分的基带收发器架构方法,以及自动数字信号处理(DSP)编码策略,这些策略允许在设计仿真阶段开发的算法的快速原型,测试和验证。特别地,描述了DSP处理器和基于现场可编程门阵列(FPGA)的测试平台,它们在收发器快速原型方法中具有不同的优势。这些试验台的设计最终用于实验,旨在证明无线局域网(WLAN)和数字音频广播(DAB)等无线系统补偿算法的有效性,其中部署了正交频分复用(OFDM)信令。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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