A fault-tolerant FFT processor

M. Tsunoyama, S. Naito
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引用次数: 66

Abstract

A scheme for concurrent fault detection by recomputing and a fault-tolerant FFT processor using the scheme are proposed. An FFT processor with perfect shuffle is considered. The realization of the processor is based on a linear cellular automaton (LCA) model having the constant-weight and equidistance properties. When a fault occurs in the processor, the fault is detected concurrently and the processor is reconfigured by replacing the faulty butterfly unit with a normal one according to the state of the processor. The reconfiguration can be made within a clock period by making a state transition based on the LCA model and by reconnecting the butterfly units according to the new state. The processor can be reconfigured quickly, so that it can be used for highly reliable real-time data processing systems.<>
一个容错FFT处理器
提出了一种基于重计算的并发故障检测方案,并利用该方案设计了一个容错FFT处理器。考虑了一种具有完美洗牌特性的FFT处理器。该处理器的实现是基于具有等权等距特性的线性元胞自动机模型。当处理器出现故障时,同时检测故障,根据处理器的状态,将故障的蝶形单元替换为正常的蝶形单元,重新配置处理器。通过基于LCA模型的状态转换和根据新状态重新连接蝴蝶单元,可以在一个时钟周期内进行重新配置。处理器可以快速重新配置,因此它可以用于高可靠的实时数据处理系统。
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