FERRAMENTAS DE ENSINO DE PLD E VHDL PARA CURSOS DE CURTA DURAÇÃO: UMA PROPOSTA BASEADA EM KITS DIDÁTICOS MODULARES

M. Guterres, Francisco Édson Nogueira de Mélo, Adriano Regis, Roberto Alexandre Dias
{"title":"FERRAMENTAS DE ENSINO DE PLD E VHDL PARA CURSOS DE CURTA DURAÇÃO: UMA PROPOSTA BASEADA EM KITS DIDÁTICOS MODULARES","authors":"M. Guterres, Francisco Édson Nogueira de Mélo, Adriano Regis, Roberto Alexandre Dias","doi":"10.37423/210504124","DOIUrl":null,"url":null,"abstract":"This article discusses a proposal for methods and t ools developed for a course on the implementation of the VHDL language learning an d teaching projects using modular kits, featuring the proposed integrated learning environm e t. It also presents a proposal for a course lasting five days, covering major topics in VHDL programming, teaching and demonstrating examples for each subject. Key-words: VHDL, Course, Training, VHDL for CPLD and FPGA prog ammable logic.","PeriodicalId":149300,"journal":{"name":"Engenharia: a máquina que constrói o futuro","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Engenharia: a máquina que constrói o futuro","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.37423/210504124","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

This article discusses a proposal for methods and t ools developed for a course on the implementation of the VHDL language learning an d teaching projects using modular kits, featuring the proposed integrated learning environm e t. It also presents a proposal for a course lasting five days, covering major topics in VHDL programming, teaching and demonstrating examples for each subject. Key-words: VHDL, Course, Training, VHDL for CPLD and FPGA prog ammable logic.
短期课程的PLD和VHDL教学工具:基于模块化教学套件的建议
本文讨论了关于使用模块化工具包实现VHDL语言学习和教学项目的课程的方法和工具的建议,其中包括所建议的综合学习环境。它还提出了为期五天的课程建议,涵盖VHDL编程的主要主题,每个主题的教学和演示示例。关键词:VHDL,课程,培训,VHDL用于CPLD和FPGA可编程逻辑。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信