Estimation of static and Dynamic characteristics for 4-bit Flash ADC

Abstract

Analog to Digital converter (ADC) finds the major role in Analog Circuit Design. Analog signal is characterized by the signal whose amplitude is continuously changing with respect to time while the amplitude and time is discrete in case of digital signal. This paper describes the design of high speed FLASH ADC using clocked digital comparator with 4-bit resolution. Analog signal is characterized by the signal whose amplitude is continuously changing with respect to time. The Clock Digital Comparator (CDC) is designed in TSMC 0.18 μm CMOS technology with supply voltage of 1.8 V. The length of transistor is fixed and depending upon the width of transistor, internal references voltages are generated in the range of 0.653 to 1.02 V. The proposed 4-bit flash ADC using CDC is designed using multiplexer based Decoder and simulated with the help of Tanner-EDA tool in TSMC 0.18 μm CMOS technology.