Youngsu Kwon, Yong Cheol Peter Cho, Jeongmin Yang, Jaehoon Chung, Kyoung-Seon Shin, Jinho Han, Chan Kim, C. Lyuh, Hyun-Mi Kim, I. S. Jeon, Minseok Choi
{"title":"AI 32TFLOPS Autonomous Driving Processor on AI-Ware with Adaptive Power Saving","authors":"Youngsu Kwon, Yong Cheol Peter Cho, Jeongmin Yang, Jaehoon Chung, Kyoung-Seon Shin, Jinho Han, Chan Kim, C. Lyuh, Hyun-Mi Kim, I. S. Jeon, Minseok Choi","doi":"10.1109/ISOCC47750.2019.9078533","DOIUrl":null,"url":null,"abstract":"AI processors are extending the application area into mobile and edge devices. The requirement of low power consumption which has been an essential factor in designing processors is now becoming the most critical factor for mobile AI processors to be viable. The high performance requirement exacerbates the energy crisis caused by a large area due to a lot of processing engines required for implementing AI processors. We present the design of an AI processor targeting both CNN and MLP processing in autonomous vehicles. The proposed AI processor integrates Super-Thread-Core composed of 16384 nano cores in mesh-grid network for neural network acceleration. The performance of the processor reaches 32 Tera FLOPS enabling hyper real-time execution of CNN and MLP. Each nano core is programmable by a sequence of instructions compiled from the neural network description by the proprietary AI-Ware. The mesh-array of nano cores at the heart of neural computing accounts for most of the power consumption. The AI-ware compiler enables adaptive power gating by dynamically compiling the commands based on the temperature profile reducing 50% of total power consumption.","PeriodicalId":113802,"journal":{"name":"2019 International SoC Design Conference (ISOCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC47750.2019.9078533","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
AI processors are extending the application area into mobile and edge devices. The requirement of low power consumption which has been an essential factor in designing processors is now becoming the most critical factor for mobile AI processors to be viable. The high performance requirement exacerbates the energy crisis caused by a large area due to a lot of processing engines required for implementing AI processors. We present the design of an AI processor targeting both CNN and MLP processing in autonomous vehicles. The proposed AI processor integrates Super-Thread-Core composed of 16384 nano cores in mesh-grid network for neural network acceleration. The performance of the processor reaches 32 Tera FLOPS enabling hyper real-time execution of CNN and MLP. Each nano core is programmable by a sequence of instructions compiled from the neural network description by the proprietary AI-Ware. The mesh-array of nano cores at the heart of neural computing accounts for most of the power consumption. The AI-ware compiler enables adaptive power gating by dynamically compiling the commands based on the temperature profile reducing 50% of total power consumption.