{"title":"Design of a development system for multimedia applications based on a single chip multiprocessor array","authors":"K. Herrmann, K. Gaedke, J. Hilgenstock, P. Pirsch","doi":"10.1109/ICECS.1996.584626","DOIUrl":null,"url":null,"abstract":"A development system for investigations on video signal processing in multimedia applications has been developed. This system is based on the single chip multiprocessor array MAXPE9 which integrates 9 programmable video signal processing elements AxPe on a silicon area of 16 cm/sup 2/. Each AxPe has a peak arithmetic performance of 1 GOPS. In order to demonstrate the computational power of the MAXPE9 for video coding schemes in multimedia applications, an universal hardware platform based on a personal computer and software tools have been developed. It allows an efficient programming of the MAXPE9 including an immediate verification on hardware. Examples of video coding schemes to be investigated are hybrid coding according to ITU-T H.261, H.263 or ISO MPEG 1/2.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.1996.584626","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A development system for investigations on video signal processing in multimedia applications has been developed. This system is based on the single chip multiprocessor array MAXPE9 which integrates 9 programmable video signal processing elements AxPe on a silicon area of 16 cm/sup 2/. Each AxPe has a peak arithmetic performance of 1 GOPS. In order to demonstrate the computational power of the MAXPE9 for video coding schemes in multimedia applications, an universal hardware platform based on a personal computer and software tools have been developed. It allows an efficient programming of the MAXPE9 including an immediate verification on hardware. Examples of video coding schemes to be investigated are hybrid coding according to ITU-T H.261, H.263 or ISO MPEG 1/2.