A V-band push-push frequency doubler using floating-Ground shield transformer in 65-nm CMOS technology

Abstract

This paper presents a low-power, V-band doubler. A floating-Ground shielding transformer balun achieved a good balanced performance and input matching by using a central capacitor-based compensation technique. The doubler exhibits a 3-dB conversion gain (CG) bandwidth of 14 GHz range from 58 to 72 GHz and demonstrates a peak CG of -6.5 dB and peak efficiency of 7.7% with an output power of 0 dBm at 64 GHz. The doubler is fabricated in 65 nm CMOS process with chip size of 663×492 μm2 and consumes 9.6-12.8 mW power.