Hardware implementation of shading models in an application specific integrated circuit

Abstract

The Truga001 is a single chip rendering processor with 12 embedded graphics functions. Phong and bump mapped shading, reflection and reflection mapping, gaseous object rendering and video mapping are incorporated fully in hardware with a MIMD structure. Shaded and texture mapped pixels are rendered at 3.8 ns/pixel which is equivalent to 1.2 million triangle polygons (100 pixels/s) with hidden surface removal. In the design of the Phong and bump mapped shading circuit, we used angular parameters for defining surface and light source normals instead of vector. This enables the circuit-scale less than 10000 gates/circuit. The chip is fabricated with a 940000 gate standard cell, 0.3 /spl mu/m CMOS in a TCP/BGA package. The paper describes the hardware architecture and its implementation technologies of the Phong and bump mapped shading in an ASIC.