A Hierarchical Approach for Modelling an MPLS Network Using VHDL

Abstract

This paper presents a hierarchical approach for modelling an MPLS (Multi-Protocol Label Switching) network using VHDL (Very high-speed integrated circuits Hardware Description Language). The MPLS technology is used because it offers a better performance and flexibility than IP routing. Six MPLS switches are modelled and simulated as follows. A label is assigned to the IP packet header by the first switch, which indicates the route that the frame must follow in the MPLS network. This label is then used by the MPLS middle switches for its management inside the network. Four middle switches change the label depending on the destination of the packet. The final switch removes the label of the IP packet header and the frame continues its path outside the MPLS network. Simulation results show that this approach allows the simulation of large networks consisting of even 256 MPLS switches.