Embedded Processor-In-Memory Architecture for Accelerating Arithmetic Operations

Abstract

A processor-in-memory (PIM) computer architecture is any design that performs some subset of logical operations in the same location as memory. The traditional model of computing involves a processor loading data from memory to perform operations, with a bus connecting the processor and memory. While this technique works well in many situations, a growing gap between memory performance and processor performance has led some researchers to develop alternative architectures.This paper details the implementation of a PIM architecture in a soft core microcontroller used to accelerate applications limited by register file size. Using an Artix-7 FPGA, an ATmega103 microcontroller soft core is modified to include a PIM core as an accelerator. The sample application of AES encryption provides a comparison between the baseline processor and the PIM enhanced machine. AES encryption using the modified microcontroller requires 38% fewer clock cycles without relying on application specific improvements, at the expense of increased program memory size and FPGA fabric utilization.