Hardware Accelerator for Generating Primitive Polynomials over GF(3)

Abstract

The paper presents a hardware accelerator that could be used to generate irreducible primitive polynomials with coefficients over GF(3). The process of generating a primitive polynomial is done by replicating the other primitive polynomial which is fixed in the device. The implemented algorithm allows the unit to generate all possible primitive polynomials of the same degree as the stored polynomial. This approach allows us to extend the cryptographic power and capabilities of the existing cryptographic devices.