On the Design of Low-Power RF Mixers

Abstract

This paper presents the design of a low-power radio frequency (RF) mixer. The technology used in the design is 0.18μm CMOS technology, and the frequency is 2.4 GHz. The design utilizes a device-level technique for reducing the power consumption, while maintaining acceptable levels for the conversion gain and noise figure. Simulation results show that increasing the transistor length increases conversion gain, and decreases noise figure for the same amount of minimum power consumption. These results show that this power-reduction technique is as promising for analog circuit as it is for digital circuits.