Impact of non-equilibrium transport and series resistances in 0.1um bulk and SOI MOSFETs

P. Bricout, E. Augendre, E. Dubois
{"title":"Impact of non-equilibrium transport and series resistances in 0.1um bulk and SOI MOSFETs","authors":"P. Bricout, E. Augendre, E. Dubois","doi":"10.1109/ESSDERC.1997.194401","DOIUrl":null,"url":null,"abstract":"Impact of non-equilibrium transport on current performances has been investigated by means of device simulation for 0.1μm bulk and SOI MOSFET’s. Although performance degradation due to series resistances is more pronounced than in bulk counterparts, SOI devices take more advantage of velocity overshoot. IIntroduction Optimization of SOI MOSFETs in the 0.1μm regime has been systematically investigated by means of device simulation, including both drift-diffusion and Monte Carlo techniques. Advantages of thin film SOI transistors in terms of short-channeleffect immunity are already known [1]. Moreover, current capability of 0.1μm devices deviates from the behavior predicted by drift-diffusion models, due to non-equilibrium transport.The enhancement of current capability, crucial for high speed applications, has been investigated for fully depleted SOI and bulk structures. The transconductance of both types of devices is also compared with experimental data. IISimulations and results Thin film SOI devices and bulk counterparts have been simulated and the influence of various technological parameters have been investigated (effective channel length L, SOI film thickness tSi, gate oxide thickness tox, buried oxide thickness tBox, bulk or SOI film doping Csub). Results of drift-diffusion simulations are used as an initial solution for Monte Carlo computations, which include non-equilibrium transport. The Monte Carlo simulator uses classical values for scattering coefficients [2]. Scattering at the Si/SiO2 interfaces is treated as a mixture of reflections (82%) and diffusions (18%), in order to obtain the same currents with drift-diffusion and Monte Carlo for a 1μm long bulk transistor (Fig.1). As shown in Fig.2, electron velocity may reach 107cm/s (saturation velocity) even at the source junction, suggesting possible enhancement of current performance due to velocity overshoot in the shorter devices. A comparison of Id-Vd characteristics extracted from drift-diffusion (DD) and Monte Carlo (MC) simulations gives the increase of current directly related to non-stationary transport. At Vg=Vd=2V, this is estimated as +28% for the bulk structure (Fig.3) and +34% for the thin-film SOI device (Fig.4). Non stationary transport also results in transconductance (gm) enhancement as reported in Fig.5. However, the values of gm are well below the maximum of transconductance predicted by the velocity saturation (about 860μS/μm for tOx=4nm). This is confirmed by a comparison with measured values given in Table 1 for devices similar to those investigated in this study. Several factors may explain this limitation: mobility degradation, access resistances, SOI film self heating [4]. According to our study, although non-equilibrium transport significantly enhances current performances, source-drain resistances is still a main limiting factor. IIIConclusion The enhancement of current capability due to non-equilibrium phenomena has been investigated for bulk and SOI MOSFETs in the 0.1μm regime. SOI devices suffer from a more pronounced degradation of current performances due to series resistances. However, this is partially compensated as thin film transistors take more advantage of velocity overshoot than their bulk counterparts, thus leading to comparable transconductances. This work is supported by DRET under contract 95-34-055-00-470-75-01 References [1] J.-P. Colinge, Silicon-on-insulator technology: Materials to VLSI, Kluwer Aca- demic Publishers, 1991 [2] C. Canali, C. Jacoboni, F. Nava, G.Ottaviani, A. Alberigi-Quaranta, Phys. Rev. B, vol.12, p2265, 1975 [3] D. P. Kern, Sub-0.1μm silicon MOSFETs, Proc. ESSDERC, p. 633, 1989 [4] K. Ohuchi, R. Ohba, H. Niiyama, K. Nakajima, T. Mizuno, A high-performance 0.05 μm MOS FET : possibility of a velocity overshoot, Jpn. J. Appl. Phys.,Vol.35, Part 1, No. 2B, p. 960, Feb. 1996 0. 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Vd (V) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 Id ( A ) Vg=0.4V Vg=0.8V Vg=1.2V Vg=1.6V Vg=2.0V Monte Carlo drift-diffusion *1 0 -5 -300. -100. 100. 300. 500. Distance from source junction(nm) -5.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 6 L=107nm 157 207 257 307nm Vg=2V Vd=2V *1 0 Fig.1: Id-Vd characteristic. L=1.0 μm, Csub=8.10 17 cm-3, tox=4 nm Fig.2: Mean electron velocity along the interface, calculated on a 10nm depth. Csub=2.10 17 cm-3, tSi=50 nm, tox=8 nm, tBOX=200 nm 0. 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Vd (V) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 Id ( A ) Vg=0.4V Vg=0.8V Vg=1.2V Vg=1.6V Vg=2.0V MC DD * 10 -4 Fig.3: Id-Vd characteristic of bulk MOSFET. L=0.1 μm, Csub=8.10 cm-3, tox=4 nm 0. 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Vd (V) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 -4 *1 0 Id ( A ) Vg=0.4V Vg=0.8V Vg=1.2V Vg=1.6V Vg=2.0V MC DD Fig.4: Id-Vd characteristic of SOI MOSFET. L=0.1 μm, Csub=8.10 cm-3, tSi=25 nm, tox=4 nm, tBOX=200 nm 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 0. 100. 200. 300. 400. 500. 600. 700. 800. 900. vsat.Cox SOI DD Bulk DD SOI MC Bulk MC Fig.5: Mean transconductance of the 0.1mm SOI transistor and its bulk counterpart. Table 1 (*) : gm max Origin Conditions Gm / (vsat.Cox) measure [3] BULK Vd=Vg=0.8V 66%* Monte Carlo figure 4 BULK Vd=Vg=0.8V 46% measure [4] SOI Vd=1.5V 47% Monte Carlo figure 5 SOI Vd=1.5V 58%","PeriodicalId":424167,"journal":{"name":"27th European Solid-State Device Research Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"27th European Solid-State Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.1997.194401","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

Impact of non-equilibrium transport on current performances has been investigated by means of device simulation for 0.1μm bulk and SOI MOSFET’s. Although performance degradation due to series resistances is more pronounced than in bulk counterparts, SOI devices take more advantage of velocity overshoot. IIntroduction Optimization of SOI MOSFETs in the 0.1μm regime has been systematically investigated by means of device simulation, including both drift-diffusion and Monte Carlo techniques. Advantages of thin film SOI transistors in terms of short-channeleffect immunity are already known [1]. Moreover, current capability of 0.1μm devices deviates from the behavior predicted by drift-diffusion models, due to non-equilibrium transport.The enhancement of current capability, crucial for high speed applications, has been investigated for fully depleted SOI and bulk structures. The transconductance of both types of devices is also compared with experimental data. IISimulations and results Thin film SOI devices and bulk counterparts have been simulated and the influence of various technological parameters have been investigated (effective channel length L, SOI film thickness tSi, gate oxide thickness tox, buried oxide thickness tBox, bulk or SOI film doping Csub). Results of drift-diffusion simulations are used as an initial solution for Monte Carlo computations, which include non-equilibrium transport. The Monte Carlo simulator uses classical values for scattering coefficients [2]. Scattering at the Si/SiO2 interfaces is treated as a mixture of reflections (82%) and diffusions (18%), in order to obtain the same currents with drift-diffusion and Monte Carlo for a 1μm long bulk transistor (Fig.1). As shown in Fig.2, electron velocity may reach 107cm/s (saturation velocity) even at the source junction, suggesting possible enhancement of current performance due to velocity overshoot in the shorter devices. A comparison of Id-Vd characteristics extracted from drift-diffusion (DD) and Monte Carlo (MC) simulations gives the increase of current directly related to non-stationary transport. At Vg=Vd=2V, this is estimated as +28% for the bulk structure (Fig.3) and +34% for the thin-film SOI device (Fig.4). Non stationary transport also results in transconductance (gm) enhancement as reported in Fig.5. However, the values of gm are well below the maximum of transconductance predicted by the velocity saturation (about 860μS/μm for tOx=4nm). This is confirmed by a comparison with measured values given in Table 1 for devices similar to those investigated in this study. Several factors may explain this limitation: mobility degradation, access resistances, SOI film self heating [4]. According to our study, although non-equilibrium transport significantly enhances current performances, source-drain resistances is still a main limiting factor. IIIConclusion The enhancement of current capability due to non-equilibrium phenomena has been investigated for bulk and SOI MOSFETs in the 0.1μm regime. SOI devices suffer from a more pronounced degradation of current performances due to series resistances. However, this is partially compensated as thin film transistors take more advantage of velocity overshoot than their bulk counterparts, thus leading to comparable transconductances. This work is supported by DRET under contract 95-34-055-00-470-75-01 References [1] J.-P. Colinge, Silicon-on-insulator technology: Materials to VLSI, Kluwer Aca- demic Publishers, 1991 [2] C. Canali, C. Jacoboni, F. Nava, G.Ottaviani, A. Alberigi-Quaranta, Phys. Rev. B, vol.12, p2265, 1975 [3] D. P. Kern, Sub-0.1μm silicon MOSFETs, Proc. ESSDERC, p. 633, 1989 [4] K. Ohuchi, R. Ohba, H. Niiyama, K. Nakajima, T. Mizuno, A high-performance 0.05 μm MOS FET : possibility of a velocity overshoot, Jpn. J. Appl. Phys.,Vol.35, Part 1, No. 2B, p. 960, Feb. 1996 0. 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Vd (V) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 Id ( A ) Vg=0.4V Vg=0.8V Vg=1.2V Vg=1.6V Vg=2.0V Monte Carlo drift-diffusion *1 0 -5 -300. -100. 100. 300. 500. Distance from source junction(nm) -5.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 6 L=107nm 157 207 257 307nm Vg=2V Vd=2V *1 0 Fig.1: Id-Vd characteristic. L=1.0 μm, Csub=8.10 17 cm-3, tox=4 nm Fig.2: Mean electron velocity along the interface, calculated on a 10nm depth. Csub=2.10 17 cm-3, tSi=50 nm, tox=8 nm, tBOX=200 nm 0. 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Vd (V) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 Id ( A ) Vg=0.4V Vg=0.8V Vg=1.2V Vg=1.6V Vg=2.0V MC DD * 10 -4 Fig.3: Id-Vd characteristic of bulk MOSFET. L=0.1 μm, Csub=8.10 cm-3, tox=4 nm 0. 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Vd (V) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 -4 *1 0 Id ( A ) Vg=0.4V Vg=0.8V Vg=1.2V Vg=1.6V Vg=2.0V MC DD Fig.4: Id-Vd characteristic of SOI MOSFET. L=0.1 μm, Csub=8.10 cm-3, tSi=25 nm, tox=4 nm, tBOX=200 nm 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 0. 100. 200. 300. 400. 500. 600. 700. 800. 900. vsat.Cox SOI DD Bulk DD SOI MC Bulk MC Fig.5: Mean transconductance of the 0.1mm SOI transistor and its bulk counterpart. Table 1 (*) : gm max Origin Conditions Gm / (vsat.Cox) measure [3] BULK Vd=Vg=0.8V 66%* Monte Carlo figure 4 BULK Vd=Vg=0.8V 46% measure [4] SOI Vd=1.5V 47% Monte Carlo figure 5 SOI Vd=1.5V 58%
非平衡输运和串联电阻对0.1um体积和SOI mosfet的影响
通过器件仿真研究了非平衡输运对0.1μm体积和SOI MOSFET电流性能的影响。虽然串联电阻导致的性能下降比批量电阻更明显,但SOI器件更能利用速度超调。通过器件仿真,包括漂移扩散和蒙特卡罗技术,系统地研究了0.1μm范围内SOI mosfet的优化问题。薄膜SOI晶体管在抗短通道效应方面的优势已经为人所知[1]。此外,由于非平衡输运,0.1μm器件的电流能力偏离漂移扩散模型预测的行为。提高电流能力对于高速应用至关重要,已经对完全耗尽的SOI和大块结构进行了研究。并将两种器件的跨导性能与实验数据进行了比较。对薄膜SOI器件和块体SOI器件进行了模拟,并研究了各种工艺参数(有效通道长度L、SOI薄膜厚度tSi、栅极氧化层厚度tox、埋地氧化层厚度tBox、块体或SOI薄膜掺杂Csub)对SOI器件的影响。漂移-扩散模拟的结果被用作蒙特卡罗计算的初始解,其中包括非平衡输运。蒙特卡罗模拟器使用经典值作为散射系数[2]。为了获得与1μm长块体晶体管相同的漂移扩散和蒙特卡罗电流(图1),在Si/SiO2界面处的散射被视为反射(82%)和扩散(18%)的混合。如图2所示,即使在源结处,电子速度也可以达到107cm/s(饱和速度),这表明在较短的器件中,速度超调可能会增强电流性能。从漂移扩散(DD)和蒙特卡罗(MC)模拟中提取的Id-Vd特性的比较表明,电流的增加与非平稳输运直接相关。在Vg=Vd=2V时,对于体结构(图3),这一比例估计为+28%,对于薄膜SOI器件(图4),这一比例估计为+34%。如图5所示,非稳态传输也会导致跨电导(gm)增强。然而,gm值远低于速度饱和预测的最大跨导值(tOx=4nm时约为860μS/μm)。通过与表1中给出的与本研究中调查的设备相似的测量值进行比较,证实了这一点。有几个因素可以解释这种限制:迁移率下降、接触电阻、SOI膜自热[4]。根据我们的研究,尽管非平衡输运显著提高了电流性能,但源漏电阻仍然是主要的限制因素。结论研究了非平衡现象对体积mosfet和SOI mosfet在0.1μm范围内电流性能的增强。由于串联电阻的存在,SOI器件的电流性能下降更为明显。然而,这是部分补偿,因为薄膜晶体管比它们的体积对应物更能利用速度超调,从而导致类似的跨导。本工作由DRET根据合同95-34-055-00-470-75-01提供支持[1]。[2]陈晓明,陈晓明,陈晓明,陈晓明,等。硅绝缘体上硅技术的研究进展[j]。[3]陈志强,张志强,张志强,一种高性能的0.05 μm mosfet:速度超调的可能性,Jpn. 1, p. 633, 1989。j:。物理卷。35, Part 1, No. 2B, p. 960, 1996年2月。0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Vd (V) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 Id (A) Vg=0.4V Vg=0.8V Vg=1.2V Vg=1.6V Vg=2.0V蒙特卡罗漂移扩散*1 0 -5 -300-100年。One hundred.300. 500. 距离源结(nm) -5.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 6 L=107nm 157 207 257 307nm Vg=2V Vd=2V *1图1:Id-Vd特性。图2:10nm深度下沿界面的平均电子速度。Csub=2.10 17 cm-3, tSi=50 nm, tox=8 nm, tBOX=200 nm。0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Vd (V) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 Id (A) Vg=0.4V Vg=0.8V Vg=1.2V Vg=1.6V Vg=2.0V MC DD * 10 -4图3:块体MOSFET的Id-Vd特性。L=0.1 μm, Csub=8.10 cm-3, tox=4 nm。0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Vd (V) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 -4 *1 0 Id (A) Vg=0.4V Vg=0.8V Vg=1.2V Vg=1.6V Vg=2.0V MC DD图4 SOI MOSFET的Id-Vd特性L=0.1 μm, Csub=8.10 cm-3, tSi=25 nm, tox=4 nm, tBOX=200 nm 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 0。One hundred.200. 300. 400. 500. 600. 700. 800. 900. 网络连线。 图5:0.1mm SOI晶体管及其批量晶体管的平均跨导。表1 (*):gm max Origin Conditions gm / (vsat.Cox)测度[3]BULK Vd=Vg=0.8V 66%*蒙特卡罗图4 BULK Vd=Vg=0.8V 46%测度[4]SOI Vd=1.5V 47%蒙特卡罗图5 SOI Vd=1.5V 58%
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