High Speed Bootstrapping Generic Voltage Level Shifter

Mahesh Vaidya, Alok Naugarhiya, Shrish Verma
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引用次数: 2

Abstract

Usage of two separate Positive and Negative voltage level shifter on the System-on-chip, increase the area and the complexity of the circuit. In the conventional circuit of both type of level shifter contention of crowbar current is present. That will affect the performance parameter like propagation delay due to slow switching and increase in power dissipation due to leakage current. To avoid the separate use of the circuit and effective performance of the circuit we have proposed the generic voltage level shifter design. This design will be able to produce both the output simultaneously. The propagation delay is observed 12.18ns and 12.82ns for positive and negative voltage shifter respectively. The Dynamic Power Dissipation has been observed 8.25 µW for 1.2V at 0.5MHz frequency. The simulation has been done in Cadence using 45nm gpdk.
高速自启动通用电压电平移位器
在片上系统采用两个独立的正、负电压电平转换器,增加了电路的面积和复杂度。在两种移电平器的常规电路中,均存在撬棍电流的争用。这将影响性能参数,如由于开关缓慢导致的传播延迟和由于漏电流导致的功耗增加。为了避免电路的单独使用和电路的有效性能,我们提出了通用电压电平转换器的设计。这种设计将能够同时产生两种输出。正移压器和负移压器的传输延迟分别为12.18ns和12.82ns。动态功耗为8.25µW,电压为1.2V,频率为0.5MHz。在Cadence中使用45nm gpdk进行了仿真。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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