Padakanti Kiran Kumar, Kallepelli Srikanth, Naveen Kumar Boddukuri, N. Suresh, B. Vani
{"title":"Lattice Heating Effects on Electric Field and Potential for a Silicon on Insulator (SOI) MOSFET for MIMO Applications","authors":"Padakanti Kiran Kumar, Kallepelli Srikanth, Naveen Kumar Boddukuri, N. Suresh, B. Vani","doi":"10.1109/DELCON57910.2023.10127385","DOIUrl":null,"url":null,"abstract":"Finding substitutes for Silicon dioxide materials is necessary when technology is scaled back. TheSOI device conceals the self heating effects induced in the MOSFET. There exists an active path of conduction from the drain to substrate and source to substrate in the entire device to curb the heating effects. The buried oxide layer used in the device is SiO2 and it is essentially free from the issues related to fabrication and performance. The comparison is made from the bulk MOSFET and SOI MOSFET from the literature. The Silicon (Si) and Silicon Germanium (SiGe) materials are considered for the analysis. The lattice temperature effects are induced for the comparative analysis of the proposed SOI MOSFET. The main parameters of interest in the study are the electric field (lateral and vertical) and potential across the channel.","PeriodicalId":193577,"journal":{"name":"2023 2nd Edition of IEEE Delhi Section Flagship Conference (DELCON)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-02-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 2nd Edition of IEEE Delhi Section Flagship Conference (DELCON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DELCON57910.2023.10127385","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Finding substitutes for Silicon dioxide materials is necessary when technology is scaled back. TheSOI device conceals the self heating effects induced in the MOSFET. There exists an active path of conduction from the drain to substrate and source to substrate in the entire device to curb the heating effects. The buried oxide layer used in the device is SiO2 and it is essentially free from the issues related to fabrication and performance. The comparison is made from the bulk MOSFET and SOI MOSFET from the literature. The Silicon (Si) and Silicon Germanium (SiGe) materials are considered for the analysis. The lattice temperature effects are induced for the comparative analysis of the proposed SOI MOSFET. The main parameters of interest in the study are the electric field (lateral and vertical) and potential across the channel.