Multi-Objective Optimization Methods for CMOS LC-VCO Design

Abstract

This work addresses the use of Electronic Design Automation (EDA) tools for topology selection and optimal sizing of Voltage Controlled Oscillator (VCO) Integrated Circuits (ICs). Instead of relying on empirical data and closed form equations to select device sizes, a simulation-based approach is adopted for better accuracy. By using an optimization method based on Evolutionary Algorithms (EAs) in combination with a tool for parametrized schematic simulations, we are able to asses the attainable performance trade-offs for different topologies and oscillation frequencies. We use Cadence Spectre for simulations and demonstrate our approach on two cross-coupled LC-VCO topologies by providing with Pareto optimal Fronts.