{"title":"Great impact of RFC technology on fast recovery diode towards 600 V for low loss and high dynamic ruggedness","authors":"F. Masuoka, K. Nakamura, A. Nishii, T. Terashima","doi":"10.1109/ISPSD.2012.6229099","DOIUrl":null,"url":null,"abstract":"In the fast recovery operation of Free-wheeling Diode (FWD), to reduce voltage surge “snap-off”, we propose the Relaxed Field of Cathode (RFC)-planar anode diode in the range of 600 V to 1700 V. RFC effect is described by the parallel connection of pin diode and pnp transistor in as a single chip solution. Its structure is realized by our thin wafer process technology utilizing the backside lithography to make p/n alternating pattern after thining the wafer. As the result, our RFC diode up to 1700 V has the following three advantages comparing with the conventional one: (a) 40% lower recovery loss (EREC), 30% lower forward voltage drop (VF), (b) a large recovery Safe Operating Area (SOA) with the high peak power density of 1.4W/cm2 and (c) easiness to adjust a lower crosspoint below rated current density in the output I-V. Therefore, the proposed RFC diode has a great potential as the next generation Si FWD in the all voltage range.","PeriodicalId":371298,"journal":{"name":"2012 24th International Symposium on Power Semiconductor Devices and ICs","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"22","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 24th International Symposium on Power Semiconductor Devices and ICs","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2012.6229099","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 22
Abstract
In the fast recovery operation of Free-wheeling Diode (FWD), to reduce voltage surge “snap-off”, we propose the Relaxed Field of Cathode (RFC)-planar anode diode in the range of 600 V to 1700 V. RFC effect is described by the parallel connection of pin diode and pnp transistor in as a single chip solution. Its structure is realized by our thin wafer process technology utilizing the backside lithography to make p/n alternating pattern after thining the wafer. As the result, our RFC diode up to 1700 V has the following three advantages comparing with the conventional one: (a) 40% lower recovery loss (EREC), 30% lower forward voltage drop (VF), (b) a large recovery Safe Operating Area (SOA) with the high peak power density of 1.4W/cm2 and (c) easiness to adjust a lower crosspoint below rated current density in the output I-V. Therefore, the proposed RFC diode has a great potential as the next generation Si FWD in the all voltage range.