A 7.0–8.0 GHz High Efficiency Medium Power Amplifier Design and 3-D Modeling for FEA

Abstract

This paper presents a 7.0 GHz to 8.0 GHz medium power amplifier (PA) using a 0.15-μm GaAs pHEMT process. To achieve the wideband high gain and high efficiency, the proposed PA applies a two-stage topology and two series LC output matching network targeting the optimum efficiency impedances over the desired bandwidth. To implement the finite element analysis for this design, a manual modeling method is proposed to generate the 3-D model of the PA in ANSYS WORKBENCH. Measurement results show that the PA achieves a small-signal gain of 26-27 dB, a saturated output power of about 25 dBm with PAE of 47% from 7.0 GHz to 8.0 GHz.