Transmitter architecture using digital generation of RF signals

J. Rode, J. Hinrichs, P. Asbeck
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引用次数: 22

Abstract

This paper describes architecture for a CDMA RF transmitter implemented in digital CMOS. The functions of up-conversion and filtering are carried out in the digital domain. A band-pass delta-sigma modulator is used to produce a one-bit output containing the desired analog signal, which is then fed to switching-mode power amplifier. Issues for the digital logic implementation to facilitate proper modulator operation at the required high clock rates (>3.3 GHz) are discussed in detail.
发射机结构采用数字生成射频信号
本文介绍了一种基于数字CMOS的CDMA射频发射机的结构。上变频和滤波功能在数字域完成。带通δ - σ调制器用于产生包含所需模拟信号的1位输出,然后将其馈送到开关模式功率放大器。详细讨论了数字逻辑实现的问题,以促进在所需的高时钟速率(>3.3 GHz)下适当的调制器操作。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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