{"title":"Design and Implementation of Three Phase Reversing Voltage Multilevel Inverter","authors":"G. Vijaykrishna, Y. Kusumalatha","doi":"10.11591/IJAPE.V5.I2.PP59-71","DOIUrl":null,"url":null,"abstract":"This paper examines how a Reversing voltage multilevel inverter (RVMLI) strategy is enforced to develop multilevel inverter fulfilment. This approach has been used SPWM-PD technique to regulate the electrical inverter. It desires numerous less range of carrier signals to deliver gate pulses of switches. Increasing within the levels during this strategy aid in reduction of output voltage harmonics expeditiously and improves power quality at output of the electrical inverter. It wants a lowered quantity of total switches, which is in a position to decreases of switching losses in this process. The Three-phase reversing voltage multilevel inverter of 7- level and 9- level is accomplished for R-load and R-L load and Three Phase Induction Motor. A reversing voltage multilevel inverter of 7- level and 9- level simulation is intended and developed. Mat lab/Simulink outcome is awarded to validate the proposed scheme.","PeriodicalId":280098,"journal":{"name":"International Journal of Applied Power Engineering","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of Applied Power Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.11591/IJAPE.V5.I2.PP59-71","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper examines how a Reversing voltage multilevel inverter (RVMLI) strategy is enforced to develop multilevel inverter fulfilment. This approach has been used SPWM-PD technique to regulate the electrical inverter. It desires numerous less range of carrier signals to deliver gate pulses of switches. Increasing within the levels during this strategy aid in reduction of output voltage harmonics expeditiously and improves power quality at output of the electrical inverter. It wants a lowered quantity of total switches, which is in a position to decreases of switching losses in this process. The Three-phase reversing voltage multilevel inverter of 7- level and 9- level is accomplished for R-load and R-L load and Three Phase Induction Motor. A reversing voltage multilevel inverter of 7- level and 9- level simulation is intended and developed. Mat lab/Simulink outcome is awarded to validate the proposed scheme.