N.J. Vocke, C. Stroud, J. Heath, W.R. Orso, K. Chhor
{"title":"Computer aided routing for complex programmable logic device manufacturing test development","authors":"N.J. Vocke, C. Stroud, J. Heath, W.R. Orso, K. Chhor","doi":"10.1109/SECON.2000.845463","DOIUrl":null,"url":null,"abstract":"We describe a computer aided design (CAD) tool developed to facilitate manufacturing test development for complex programmable logic devices (CPLDs). The CAD tool specifically supports manual and semi-automatic routing for the Cypress Delta 39 K series CPLD for the purpose of manufacturing testing of the programmable interconnect network within the device as well as all programmable logic functions. Two routing algorithms were developed and proved to work correctly with the best one chosen based on complexity analysis. The resultant router CAD tool supports all CPLDs in the Delta 39 K series family and produces the configuration bits necessary to program or configure the CPLD for the extensive tests that must be applied to ensure that the manufactured CPLDs are defect-free. The router has also been used extensively in the verification portion of the design process of the Delta 39 K series CPLDs. While the router is specific to a particular CPLD, the basic approach, including features and algorithms, is applicable to any CPLD or FPGA where programmable routing resources must be specified to accurately test the device and provide design verification.","PeriodicalId":206022,"journal":{"name":"Proceedings of the IEEE SoutheastCon 2000. 'Preparing for The New Millennium' (Cat. No.00CH37105)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-04-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE SoutheastCon 2000. 'Preparing for The New Millennium' (Cat. No.00CH37105)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SECON.2000.845463","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
We describe a computer aided design (CAD) tool developed to facilitate manufacturing test development for complex programmable logic devices (CPLDs). The CAD tool specifically supports manual and semi-automatic routing for the Cypress Delta 39 K series CPLD for the purpose of manufacturing testing of the programmable interconnect network within the device as well as all programmable logic functions. Two routing algorithms were developed and proved to work correctly with the best one chosen based on complexity analysis. The resultant router CAD tool supports all CPLDs in the Delta 39 K series family and produces the configuration bits necessary to program or configure the CPLD for the extensive tests that must be applied to ensure that the manufactured CPLDs are defect-free. The router has also been used extensively in the verification portion of the design process of the Delta 39 K series CPLDs. While the router is specific to a particular CPLD, the basic approach, including features and algorithms, is applicable to any CPLD or FPGA where programmable routing resources must be specified to accurately test the device and provide design verification.