I_V Characteristic of Vertical Double Diffused Metal Oxide Semiconductor (VDMOS) Power Transistor Using Silvaco-TCAD

Mourad Bella, M. Ghoumazi
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Abstract

Today's electronics scenario finds itself with the advancement in the field of foremost important component MOSFET. Though one-step ahead of MOSFET, power MOS transistor such as VDMOS has recently begun to rival bipolar devices in power handling capability. In this paper, the results of simulation of VDMOS transistor have been presented. Additionally, the transfer characteristics of the VDMOS transistor are simulated. The drain current (Ids) as a function of the gate voltage and of the drain voltage was simulated for different work function values as well as for several oxide thickness and gate lengths, respectively. The results obtained show that when the work function and the oxide thickness as well as the gate length increase, the threshold voltage also increases. The VDMOS transistor is virtually fabricated using ATHENA software and simulation is done with help of ATLAS software and all graphs are plotted using Tonyplot in Silvaco.
利用Silvaco-TCAD研究垂直双扩散金属氧化物半导体(VDMOS)功率晶体管的I_V特性
今天的电子场景发现自己在最重要的元件MOSFET领域的进步。虽然功率MOS晶体管(如VDMOS)比MOSFET领先一步,但最近在功率处理能力方面开始与双极器件相媲美。本文给出了VDMOS晶体管的仿真结果。此外,还模拟了VDMOS晶体管的传输特性。在不同的功函数值以及不同的氧化物厚度和栅极长度下,分别模拟了漏极电流(Ids)作为栅极电压和漏极电压的函数。结果表明,当功函数、氧化层厚度和栅极长度增大时,阈值电压也随之增大。使用ATHENA软件虚拟制作VDMOS晶体管,并借助ATLAS软件进行仿真,所有图形都使用Silvaco中的Tonyplot绘制。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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