A 12-channel 2.5 Gb/s receiver IC for parallel optical interconnect

GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 23rd Annual Technical Digest 2001 (Cat. No.01CH37191) Pub Date : 2001-10-21 DOI:10.1109/GAAS.2001.964346

B. Mayampurath, A. Wu, A. Armstrong

引用次数: 1

Abstract

A 12-channel, 2.5 Gb/s, receiver IC for parallel optical interconnect is described. Each channel contains a Metal-Semiconductor-Metal Photodetector (MSM PD), Transimpedance Amplifier (TIA), Limiting Amplifier (LA), Output Buffer (OB) and Loss of Signal Detector (LOS). The chip was designed and fabricated in a 0.4 /spl mu/m GaAs MESFET process. Using a 3.3 V power supply, the chip typically consumes 600 mA, and each channel provides 400 mV differential outputs for input optical power more than -20 dBm. Typical single channel sensitivity is -19.5 dBm. Details of the chip design and layout and measured results are presented.

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用于并行光互连的12通道2.5 Gb/s接收IC

介绍了一种用于并行光互连的12通道、2.5 Gb/s接收集成电路。每个通道包含一个金属-半导体-金属光电检测器(MSM PD)、跨阻放大器(TIA)、限幅放大器(LA)、输出缓冲器(OB)和信号损耗检测器(LOS)。该芯片采用0.4 /spl μ m GaAs MESFET工艺设计制作。该芯片采用3.3 V电源，功耗一般为600ma，每个通道提供400mv差分输出，输入光功率大于- 20dbm。典型的单通道灵敏度为-19.5 dBm。给出了芯片的详细设计、布局和测量结果。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 23rd Annual Technical Digest 2001 (Cat. No.01CH37191)

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