Nesrine Mhiri, K. Ammous, Ibtissem Tiss, H. Mejbri, Abdulrahman Alahdal, A. Ammous
{"title":"Design of a Novel Analog MPPT Integrated Chip Used in PV Systems Applications","authors":"Nesrine Mhiri, K. Ammous, Ibtissem Tiss, H. Mejbri, Abdulrahman Alahdal, A. Ammous","doi":"10.1109/IREC48820.2020.9310426","DOIUrl":null,"url":null,"abstract":"Tracking the Maximum Power Point (MPP) of a photovoltaic (PV) array is usually an essential part of a PV system. The problem addressed by Maximum Power Point Tracking (MPPT) techniques is to find the voltage VMPP or current IMPP at which a PV array should operate to generate the maximum power output PMPP under a given temperature and irradiance. A Novel analog integrated maximum power point tracking (MPPT) chip is presented in this paper. The main task is to design and implement an integrated circuit (IC) in CMOS technology to control the MPP in PV panel. The MPPT controller can be made small enough to be integrated into the junction box, which is practical and cost effective for MPPT topology. For the design, two main steps are necessary. First, the front end step, which consists of the validation of the design by Cadence simulations. These steps are crucial since they determine the performance capability of the design. The second phase is the back end step, which consists of the design of the layout of the circuit and all necessary verifications.","PeriodicalId":190354,"journal":{"name":"2020 11th International Renewable Energy Congress (IREC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 11th International Renewable Energy Congress (IREC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IREC48820.2020.9310426","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Tracking the Maximum Power Point (MPP) of a photovoltaic (PV) array is usually an essential part of a PV system. The problem addressed by Maximum Power Point Tracking (MPPT) techniques is to find the voltage VMPP or current IMPP at which a PV array should operate to generate the maximum power output PMPP under a given temperature and irradiance. A Novel analog integrated maximum power point tracking (MPPT) chip is presented in this paper. The main task is to design and implement an integrated circuit (IC) in CMOS technology to control the MPP in PV panel. The MPPT controller can be made small enough to be integrated into the junction box, which is practical and cost effective for MPPT topology. For the design, two main steps are necessary. First, the front end step, which consists of the validation of the design by Cadence simulations. These steps are crucial since they determine the performance capability of the design. The second phase is the back end step, which consists of the design of the layout of the circuit and all necessary verifications.