J. Zolper, A. Baca, M. Sherwin, V. Hietala, J. Shul
{"title":"Ion-implanted GaAs JFETs with f/sub t/>45 GHz for low-power electronics","authors":"J. Zolper, A. Baca, M. Sherwin, V. Hietala, J. Shul","doi":"10.1109/GAAS.1996.567836","DOIUrl":null,"url":null,"abstract":"GaAs Junction Field Effect Transistors (JFETs) are reported with gate lengths down to 0.3 /spl mu/m. The structure is fully self-aligned and employs all ion implantation doping. p/sup +/-gate regions are formed with either Zn or Cd implants along with a P co-implantation to reduce diffusion. The source and drain implants are engineered with Si or SiF implants to minimize short channel effects. 0.3 /spl mu/m gate length JFETs are demonstrated with a subthreshold slope of 110 mV/decade along with an intrinsic unity current gain cutoff frequency as high as 52 GHz.","PeriodicalId":365997,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium. 18th Annual Technical Digest 1996","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium. 18th Annual Technical Digest 1996","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.1996.567836","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
GaAs Junction Field Effect Transistors (JFETs) are reported with gate lengths down to 0.3 /spl mu/m. The structure is fully self-aligned and employs all ion implantation doping. p/sup +/-gate regions are formed with either Zn or Cd implants along with a P co-implantation to reduce diffusion. The source and drain implants are engineered with Si or SiF implants to minimize short channel effects. 0.3 /spl mu/m gate length JFETs are demonstrated with a subthreshold slope of 110 mV/decade along with an intrinsic unity current gain cutoff frequency as high as 52 GHz.